From ExtremeTech: Rumors have continued to swirl around AMD’s upcoming Zen processor and its performance capabilities, but a new slide from a CERN presentation is going to dump more fuel on the speculation fire. During a presentation on technology and market trends for the data center, one of the CERN presenters showed in a slide.
Most of this is information we already knew or have gleaned from software patch notes and other updates, but the claim that AMD was planning a 32-core with a whopping eight-channel DDR4 memory interface is sure to raise some eyebrows. That’s twice what Intel currently offers in high-end server architectures — not to mention 2x the number of cores.
The other way to think about this, on the other hand, is that if AMD wants to offer a 32-core CPU, it better be able to keep those cores fed from main memory. From this perspective, eight channels of DDR4 isn’t odd — it’s actually what you’d need to keep the CPU busy.
So far, the tidbits that have leaked out about Zen sound pretty reasonable. The new architecture is rumored to have a 64KB L1 cache (32d, 32i) and a 512KB L2 cache per core. The L3 cache is rumored to be 8MB and split between each group of four cores.
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