AMD Rolls-Out New-Generation Radeon HD 6900 Graphics Processors

From X-bit Labs: Graphics business unit of Advanced Micro Devices this week unveiled its new graphics processing unit (GPU) code-named Cayman, which significantly changes the architecture of ATI Radeon graphics processors, but brings relatively small performance improvement compared to the previous generation of products.

“AMD Radeon HD 6900 series graphics feature AMD’s second-generation, DirectX 11-capable architecture, new image quality improvements and up to 2GB of graphics frame buffer, making it a great choice for gamers and enthusiasts,” said Matt Skynner, corporate vice president and general manager of GPU division at AMD.

The Radeon HD 6900 "Cayman" GPU sports a number of major architectural changes compared to the previous-generation graphics processors.

* Firstly, the Cayman has two independent graphics engines, each of which has its own vertex assembly, geometry assembly, tessellation, backface culling, clipping, rasterization/HyperZ and so on units. As a result, the chip has a peak throughput of 2 primitives per clock while maintaining a peak rasterization rate of 32 pixels per clock, a significant improvement over the previous-generation products.

* Secondly, the Radeon HD 6900 changes the stream core (SC) to the so-called VLIW4 (very long instruction word) architecture. Previous-generation graphics processors featured VLIW5 architecture stream cores and each of the SCs featured four simple arithmetic logic units (ALUs, or processing elements as developers sometime call them) for simplistic operations and one so-called transcendental arithmetic logic unit capable of performing one complex instruction per clock. While the architecture survived for over four years, engineers from the company claim that it was almost impossible to utilize all five ALUs at once due to difficulties with register management and natural complexity of writing a program that could use all five units at once. The new four ALUs are neither simplistic nor complex and can perform up to 4 FMA (or 4MAD or 4 MUL of 4 ADD, etc) operations per clock. According to developers, such architecture saves around 10% of die area while maintaining similar performance and simplifies scheduling and register management. As a result of SC architectural change, each SIMD of the Cayman processor 64 stream processors. AMD claims that the maximum amount of SIMDs per chip is 24 (1536 ALUs), but earlier the rumours claimed that it could be as high as 30.

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