AMD FX-Series Top-of-the-Range Microprocessor to Cost $320 - Report

From X-bit Labs: Even though Advanced Micro Devices' next-generation FX-series microprocessors code-named Zambezi and powered by Bulldozer micro-architecture are projected to bring the company back onto the market of high-performance desktop microprocessors, the new chips will be relatively affordable. For example, the highest-performing model will cost $320, according to a media report.

As reported previously, the initial family of FX chips will include four models: two eight-core flavours, one six-core version as well as one quad-core chip. The top-of-the-line FX-8130P and FX-8110 will cost $320 and $290, respectively, six-core FX-6110 central processing unit will be priced at $240, whereas quad-core FX-4110 microprocessor will cost $190, according to a news-story by Donanim Haber web-site.

It is rather noteworthy that AMD will sell its highest-performing microprocessor for $190 - $320. Positioning of the chip in AMD’s documents seen by X-bit labs clearly shows that AMD wanted to address the high-end desktop CPU market. In particular, AMD wanted to compete against Intel Core i7-2600-series microprocessors with its eight-core chip. Intel’s quad-core Core i7-2600K costs $317. It remains to be seen how successful will AMD FX-8100-series be against Intel’s six-core code-named Bloomfield Core i7 family chips.

Among the advantages that are mentioned by the AMD documents that X-bit labs has happened to see are “more overclocked cores”, “more cores dual graphics, OpenCL and GPU” compute and others. By the end of the year the firm expects over 10% of its desktop products to be based on the Bulldozer micro-architecture and be in the AM3+ form-factor.

AMD Orochi design is the company's next-generation processor for high-end desktop (Zambezi) and server (Valencia) markets. The chip will feature eight processing engines, but since it is based on Bulldozer micro-architecture, those cores will be packed into four modules. Every module which will have two independent integer cores (that will share fetch, decode and L2 functionality) with dedicated schedulers, one "Flex FP" floating point unit with two 128-bit FMAC pipes with one FP scheduler. The chip will have shared L3 cache, new dual-channel DDR3 memory controller and will use HyperTransport 3.1 bus. The Zambezi chips will use new AM3+ form-factor and will require brand new platforms.

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