From PC World: Intel executives disclosed that 2024’s Lunar Lake chip will be optimized for ultraportables for 15 watts and below, while reiterating that 2023’s Meteor Lake chip is still on track. And if you haven’t guessed it already, the future of Intel’s processors continues to be “disaggregated” designs that will include various application-specific tiles all working in concert.
All this is scheduled to be talked about at this week’s Hot Chips conference, an academic conference where, typically, existing products are dissected by their designers. Intel chief executive Pat Gelsinger will deliver a keynote titled “Semiconductors Run the World,” which will talk about how semiconductors are becoming more specialized through the integration of various functions. A number of big-name chip companies, including AMD, Arm, Mediatek, Nvidia, and Samsung will join Tesla and smaller startups to talk about their own advances.
It’s not especially likely that Intel’s own product teams will reveal any major news at the show. However, Boyd Phelps, corporate vice president of Intel’s design engineering group, and general manager of client engineering, said that Intel is scheduled to present a paper on Meteor Lake and Arrow Lake, with an emphasis on discussing how the tiles are connected using Intel’s Foveros architecture. Foveros, which stacks logic dies vertically, was first introduced in the 2019 “Lakefield” chip.
Now, the emphasis is simply to connect discrete logic dies within a single package. A decade ago, all of the dies would simply logic blocks of a single monolithic chip. Now, they’re individual dies, part of Meteor Lake’s tiled architecture Intel outlined in February. While Intel characterizes Meteor Lake as being manufactured on its Intel 4 manufacturing technology, that’s a bit of a misnomer. Meteor Lake’s GPU tile will be built by TSMC (on its N5 process), and the SOC and IO expander tiles use TSMC’s N6 technology. The CPU tile is built in-house by Intel on the Intel 4 technology. It’s connected together by a sort of passive interface, which uses the Foveros technology, Boyd explained.
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