From DailyTech: The Cavite facility in the Philippines is actually two buildings next to each other, known as CV1 and CV2. CV1 had the capability to handle wafer sizes in 200 and 300mm in its 268,000 square foot clean room, while CV2 could only handle 200mm in its smaller 149,000 sq. ft. clean room. CV1 was built in 1997, while CV2 was built in 1998 and handled mostly flash memory processing, which has been made redundant due to Intel exiting that business line.
The Penang facility in Malaysia consists of three buildings. PG6 and PG7 could only handle 200mm wafers, but PG8 was upgraded in 2005 to handle 300mm wafers. Malaysian operations will continue and consolidate at their Kulim facilities.
After Intel's wafers are produced at a fab, they are sent to Intel's Assembly and Test facilities where each wafer is cut into individual silicon dies, placed within external packages, and tested for functionality.
Intel is consolidating a lot of its Asian Assembly and Testing into its newest facilities in Chengdu, China, and Ho Chi Minh City, Vietnam, due to labor costs and lower demand.
Production will halt at fab 20 in Hillsboro, Oregon. It was built in 1996 to handle 0.13 micron core logic production on a 200mm line, boasting a 140,000 sq. ft. clean room.
Intel will also halt wafer production operations at its D2 facility in Santa Clara, California. Built in 1988, it handled mostly flash and communications chips, as well as cellular and handheld product development. Throughout its twenty year life, D2 saw 0.13 micron and 90nm production, and was upgraded in 2006 to run 65nm on its 200mm line. Intel's headquarters are also located in the City of Santa Clara.
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